| ISBN: ISBN: 978-3-540-66483-3
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| ISBN: ISSN 0302-9743
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| ISBN: DOI: 10.1007/3-540-48254-7_23
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description |
The paper presents a new approach to transparent BIST for
word-oriented RAMs which is based on the transformation of March
transparent test algorithms to the symmetric versions. This approach
allows to skip the signature prediction phase inherent to
conventional transparent memory testing and therefore to
significantly reduce test time. The hardware overhead and fault
coverage of the new BIST scheme are comparable to the conventional
transparent BIST structures. Experimental results show that in many
cases the proposed test techniques achieve a higher fault coverage
in shorter test time.
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publisher |
Berlin / Heidelberg: Springer
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type |
Text
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| Article in Proceedings
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source |
In: Proceedings of the 3rd European Dependable Computing Conference
(EDCC), Prague, Czech Republic, September 15-17, 1999, pp. 339-350
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contributor |
Rechnerarchitektur (IFI)
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subject |
Reliability, Testing, and Fault-Tolerance (CR B.8.1)
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